Matheus Trevisan Moreira

Matheus Trevisan Moreira

Mentor
Rising Codementor
US$25.00
For every 15 mins
2
Sessions/Jobs
ABOUT ME
Questions before answers
Questions before answers

Matheus is a creative and motivated professional with 17 years of work experience and a passion for computers. Adaptable and with exceptional communication skills, he likes to be challenged and can easily navigate cross-functional teams to collaborate and effectively deliver solutions to organizational goals. He is fluent in ASIC/VLSI and software, and is always looking to learn something new. Matheus dedicated 9 years of his life to research and education, and in the last 8 years he has been working in industry applying his scientific knowledge to technology products. He is currently a Design Engineer at Meta and before that he was a Design Engineer at Apple. Also, in the last years Matheus started to focus on learning about neural network accelerators and actively contribute to open source projects and the research community. His latest interest is the human brain and he is studying to understand how it operates and working to replicate parts of its functionality in software and hardware.

Portuguese, Spanish, English
Pacific Time (US & Canada) (-08:00)
Joined November 2020
EXPERTISE
15 years experience
10 years experience
15 years experience
10 years experience
3 years experience
2 years experience
15 years experience

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SOCIAL PRESENCE
GitHub
lichen
Library Characterization Environment - Open source tool for Cell Library Characterization
C++
3
0
utils
0
0
EMPLOYMENTS
Design Engineer
Meta
2022-07-01-Present
Firmware Lead
Firmware Lead
Python
C++
C
Python
C++
C
Design Engineer
Apple
2021-01-01-2022-07-01
Design engineer responsible for SerDes frontend design and Firmware development
Design engineer responsible for SerDes frontend design and Firmware development
Python
C
Verilog
Python
C
Verilog
Technical Director
Chronos Tech
2016-02-01-2021-01-01
At Chronos I lead the development of the circuits of the core technology and the methodology and design flow to implement, debug and test...
At Chronos I lead the development of the circuits of the core technology and the methodology and design flow to implement, debug and test it using standard EDA. I worked to model and implement the software infrastructure to deploy Chronos, using Python and TCL, and created mathematical models and analysis tools to explore the design space. Besides that, I worked writing patents, white papers and technical reports.
Python
C++
C
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Python
C++
C
Pandas
Tcl
Verilog
TensorFlow
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